Power, heat, and their combined effects on aging and reliability, are becoming increasingly critical variables in the design of chips that will be used across a variety of new and existing markets.Anush Mohandass, NetSpeed's VP of Marketing and Business Development, discusses the role of energy movement in chip architecture, in this Semiconductor Engineering piece: https://semiengineering.com/system-level-power-modeling-takes-root/Anush: "Good engineers talk about bandwidth in terms of gigabytes per second, or what the upper limit is in terms of wattage. The really sharp architects talk about energy, energy movement, and what that means. They don’t just talk about gigabytes per second. They say gigabytes per second per watt so they include the concept of energy. And as energy directly corresponds to the battery life, it’s pretty intuitive. You use more energy. But there’s a fixed amount of battery that you have, so you should care about energy because that impacts the standby battery or the per-use pack.”
Whether you are a hardware architect looking for cache coherency solutions to realize your ideas into silicon or a SoC designer looking for a high performance and efficient interconnect or a safety manager looking for solutions to build resilient, fault-tolerant systems—NetSpeed has a solution for you.
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