If you search the web for IP traffic growth, you will find many graphics, but the common result is that IP traffic is growing with high CAGR for many years and will again continue to grow with such high CAGR for the next five years. For example the global mobile data traffic is expected to grow with 53% CAGR 2015-2020… even if the smartphone shipment itself will see more modest growth. Before ending in a data center, this data traffic will pass through networking and telecom infrastructure.SoC for backhaul equipment have to be designed to support this 20% increase of global IP traffic every year. The performance of these SoCs has to be on the bleeding edge, both in terms of data bandwidth, which is needed to exchange large amounts of data and minimum latency, which is needed to support intensive computation. The SoC area has to be pushed to the ASIC technology limit, but the chip has to be kept economically viable. Last imperative requirement, the Time-To-Market (TTM) has to be as short as possible because the bandwidth demand is growing so fast. All of the above translates into very aggressive SoC specifications and design requirements.One of NetSpeed’s customers is market leader in the networking segment and the company has to launch new designs as frequently as needed to support the rapid data bandwidth expansion. To optimize design resource, architecture & front-end design was done by the customer and the back-end by 3rd party ASIC vendor. The previous approach for SoC interconnect design was based on spreadsheet analysis. It was too time consuming, leading to major issues that severely impacted the schedule, including a long iterative loop with the ASIC vendor and last-minute bug discoveries which forced late design changes. The company made an exhaustive review of the other NoC solutions and NetSpeed’s NoC IP was selected because of its more efficient packet processing architecture.What are the design challenges for this 7th generation networking SoC? They are mostly linked with performance, in term of frequency increase and bandwidth to be multiplied by 4X from previous generation, SoC area (cost) and TTM for this extra-large SoC.Selecting NetSpeed’s NocStudio, with it’s interconnect synthesis engine, had a major impact on the project schedule because it provided a very fast turnaround, 10x faster than before. As an example, the interconnect RTL and C++ and test bench generation took minutes instead of the 6 to 8 months previously required! Such a fast turnaround time when using NocStudio allowed rapid SoC-level architecture modeling and performance analysis that was ideal for optimizing the network for the company’s requirements.Managing and avoiding deadlocks is the new frontier for complex, multi-core SoCs. Using patented algorithms and formal methods to design NoCs that are correct-by-construction, NocStudio generated an architecture that was deadlock-free at the application level.Throughput is a measure of how much actual data can be sent per unit of time across a network, channel or interface. While throughput can be a theoretical term like bandwidth, it is more often used in a practical sense, for example, to measure the amount of data actually sent across a network in the “real world”. At design stage, architects have worked to increase SoC bandwidth by 4X from previous generation. When the SoC will be integrated in a networking system, we can expect the throughput to be improved by the same factor, if not more.NetSpeed interconnects can be optimized to reduce wire lengths and buffer count. Reducing wires and buffer count has a direct impact on both power consumption and area. In this particular case, using NetSpeed’s solution led to a 25% reduction in wires, this allowed the company to avoid an expensive metallization level.Finally, because NetSpeed’s solution dramatically reduces development time, it has helped the company to optimize valuable human capital by allowing it to offload key architects sooner so they can focus on other areas of the SoC.This blog is extracted from NetSpeed “Networking” Success Stories. You can read more about this story and Mobile AP, Automotive SoC, Networking, Digital Home SoC or Data Center Storage stories hereFrom Eric Esteve from IPNEST
Whether you are a hardware architect looking for cache coherency solutions to realize your ideas into silicon or a SoC designer looking for a high performance and efficient interconnect or a safety manager looking for solutions to build resilient, fault-tolerant systems—NetSpeed has a solution for you.
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