Sundari Mitra, CEO of NetSpeed Systems, Featured in EE Times

  • 15th May 2014

Startup Faces SoC, Gender Challenges
Rick Merritt
5/15/2014 12:40 PM EDT

SAN JOSE, Calif. — Sundari Mitra wants to change the way SoCs are designed with her new interconnect startup, NetSpeed Systems. Unlike her company, which is just emerging from stealth mode, in some ways female executives in the semiconductor industry are always under a spotlight.
"In the initial part of my career, it took double the work to prove I could compete with the men who dominate this industry. Once you demonstrate that, people don't forget you," said Mitra, a 25-plus-year veteran of the semiconductor industry. "There are so few of us in this industry -- I am an Indian woman executive -- that I don't have to do much for people not to forget me."
It's a double-edged sword. "Being a [chief] sales person for my company, it's a great advantage. They don't forget anything I do." However, "I always have to deliver and be correct."
Mitra started her career in the 1980s as an analog and mixed-signal chip designer on the Intel 286. Later she spent 12 years at Sun Microsystems, where she moved into management. When the company fell on hard times, she took an exit package and considered her next move.
"I was sitting in Silicon Valley and had never done a startup," she said. "It was like living on the beach and not going in the water."
Her first outing did well, despite the one-in-10 success ratio of the startup world. Prism Circuits, a designer of serial memory products, grew to 50 people with $11 million in revenue and was acquired by Mosys, where she was mentored by the industry veteran Len Perham.
Wanting to "do something different," Mitra reflected on the lessons of her career. They centered on intractable issues in SoC design. "I must have done 10 tapeouts in my career, all facing the same set of problems. Timing closure was always a challenge. Bugs always came out a week before tapeout or sometimes after tapeout, needing lots of fixes. It was not right."
The idea emerged for an on-chip network that could be configured in ways that understood circuit timing and placement issues to optimize designs for power, performance, or area. She applied lessons from the synthesis tools of the 1980s, which used IC design constraints, and the networking systems of the 1990s, which modeled traffic flows to avoid congestion.
This resulted in a set of configurable interconnect and power-management blocks now in the hands of a diverse set of five unnamed customers. The proof points will come this fall, when the customers are expected to try their first tapeouts for designs. They have already been running the designs in emulation systems for as long as a year.
When we talked, Mitra was travelling in Taiwan meeting with mobile application processor vendors.
"Our technology is very conducive to that area," she said, noting a coming generation of 64-bit ARM chips. "People don't know how to harness the bandwidth of that architecture. They lack an analysis tool." Apple "has its own internal analysis tools." NetSpeed takes "a very quantitative, math-based approach to building an SoC."
NetSpeed's costs are based on an IP model and include an up-front licensing fee plus a per-chip royalty. The licensing fees vary based on the number of IP blocks. The company supports 28nm and FinFET processes.
Established interconnect vendors such as ARM, Arteris, and Sonics deliver libraries for creating an on-chip network. Mitra said NetSpeed is unique in delivering tools to optimize the architecture and the physical design of the interconnect and the resulting chip.
"The market could use another good interconnect IP, and they seem to have identified all the right problems," said Rich Wawrzyniak, an ASIC analyst at Semico Research. However, "until designers use [NetSpeed products] in devices, it's hard to gauge where they will fit in."
Most ASIC designers still build their own on-chip networks, but they are likely to seek outside help, given the rising complexity of the technology, Wawrzyniak said.
Ganesh Ramamoorthy, a chip analyst at Gartner in Mumbai, said current on-chip network approaches focus on providing IP blocks and tools to stitch them to the main SoC. "NetSpeed takes a top-down approach," which may help it differentiate itself.
The "tool-led approach... can be very beneficial for smaller chip vendors in markets such as China, encouraging them to experiment more with functional integration for specific use cases," he said. However, NetSpeed faces "a grave risk of being misunderstood as an EDA tool vendor," and the startup must clearly market itself as an IP vendor.
Whatever the challenge, Mitra seems to be up for it. "At this point, I am not interested in being acquired. I want to build value in the company," she said. "I do not have the DNA to retire."
— Rick Merritt, Silicon Valley Bureau Chief, EE Times

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